Waveform Conversion, Part I - Sine to Square

The system designer is often called upon to convert a sine wave from an
oscillator, power splitter, or other RF device into a square wave suitable for
driving a logic device. There are numerous acceptable techniques and the best
choice will depend upon several factors including the operating frequency,
available signal power, available DC power, acceptable edge speeds, and the
characteristics of the logic family.

The simplest technique is to directly couple the sine wave into the logic
input with a suitable bias circuit. The sine wave should be a few volts p-p for
reliable triggering. This technique is most suitable for CMOS devices in the
older 4000 series or HC-MOS and only requires a coupling capacitor and two
resistors to bias the input to VCC/2. This simple bias scheme should be avoided
with AC-MOS devices unless the frequency and amplitude are high and the input
signal is always present. Slow-moving or noisy inputs can cause multiple
triggers on any gate, however, and Schmitt trigger inputs are recommended when
the input sine wave is large enough to overcome the hysteresis. As an example,
the 74HC14 Schmitt trigger has a hysteresis voltage of 0.9 volts so an input
sine wave should be a couple of volts at a minimum. The simple biased-gate
scheme is shown below:

In some instances the input signal is too small to drive the logic devices
but sufficient power is available to drive a step-up transformer or matching
circuit. One unusual approach uses a series RLC circuit to step up the voltage.
At the input frequency, the RLC network simply looks like a resistor since the
inductor and capacitor are series resonant. The resistor value is selected to
limit the current at resonance (typically 100 ohms) and the inductive reactance
is selected to give the desired gate voltage. In the example below, the inductor
is selected to give about 5 volts of swing for the signal input current. It is
reasonably safe to use the input protection diodes in AC logic to clamp the
swing since AC devices are quite immune to latch-up and the input protection
circuit is quite robust.

An ordinary RF step-up transformer may also be used to achieve the higher
voltage swing and fairly broadband transformers may be constructed on ordinary
ferrite beads, pot cores or miniature balun cores.

Although these techniques will give reasonably reliable results, especially
when Schmitt trigger inputs are used, more sophisticated approaches may be
desired to handle slow-moving signals or wide signal level variation. The
following simple two-transistor differential amplifier will give a good square
wave for a wide range of sine wave inputs and it has sufficient gain to square
up the edges of slower input frequencies. The differential amplifier approach
avoids transistor saturation which often limits the speed of single-transistor
circuits. Fast diodes may be used to prevent saturation in single-transistor
amplifiers but the cost and complexity usually exceeds the addition of another
transistor.

Numerous integrated circuit solutions are also available. Line receivers are
an excellent choice and are truly designed for the job. The input stages are
typically differential amplifiers offering fairly high input impedance and good
speed. Some line receivers have built-in voltage dividers allowing the inputs to
handle voltages far beyond the power supply rails and some have built-in voltage
references for biasing the input stage. They are also available in combination
with line drivers and many have tri-state control inputs. The possible choices
are numerous - the line driver, receiver data books are among the thicker
volumes on the engineer's bookshelf. Beware that many line receivers have
built-in frequency response roll-off making them unsuitable for squaring higher
frequency oscillators.

The MC1489 is a typical quad line receiver which operates from a single 5
volt supply and can handle input signals from-30 to +30 volts - but the
threshold is internally set. This device features a built-in threshold
hysteresis of about 0.3 volts (0.9 for the MC1489A) with the lower threshold
near one volt. A "response control" pin is provided to shift the threshold
points or to add signal filtering.

Another example is the SN55182 which is a dual differential line receiver
that also operates from a single 5 volt supply. It is designed to respond to
small differential voltages riding on fairly large common-mode voltages and
noise. The inputs may be biased to switch anywhere within the 15 volt bipolar
common-mode input voltage range. The input impedance is a few thousand ohms but
a built-in 170 ohm line-termination resistor is provided. This line receiver's
frequency response may also be lowered by adding an external capacitor and a
strobe input is available to force the output to a high level. Since many line
receivers operate from a single supply and can sense below ground, the schematic
can be quite simple. The following circuit shows 1/2 of the SN55182 connected to
convert a sine wave centered around ground - typical of transformer or power
splitter outputs. The only external component indicated is a 0.1 uF power supply
capacitor! It may be desirable to add an additional resistor to ground at the
input to match a particular source or cable impedance.

High-speed comparators may also be used in a similar manner to line receivers
but the resistor biasing must be done externally and some amount of hysteresis
should be added in the form of a feedback resistor from the output to the
positive input to ensure positive switching. Some comparators have "totem pole"
outputs which are specifically designed to drive TTL and CMOS loads and some
have open-collector outputs which only need a pull-up resistor to achieve
suitable logic levels.

Many prescaler devices are specifically designed to handle small sine wave
inputs and all that is required is a DC blocking capacitor. The designer should
be aware that some prescalers will "free-run" or oscillate when no input signal
is present.

High frequency sine waves can often be directly applied to ECL inputs with
the appropriate bias circuitry if the sine wave amplitude falls within the ECL's
voltage specifications. Some ECL devices have a reference voltage output pin
which may be used to bias the input. Simply connect a resistor from the
reference to the input and capacitor couple the input signal.

Waveform Conversion, Part II - Square to Sine

Oscillators with logic compatible square wave outputs are not suitable for
driving many RF devices since the characteristic impedance is usually well below
the desired source impedance and the odd harmonics can generate undesired
intermodulation products. Converting a square wave to a sine wave is usually
accomplished with either a low pass or bandpass filter and a resistor network to
achieve the desired impedance. An amplifier at either the input or output of the
filter may be necessary to achieve sufficient signal amplitude.

The circuit below uses a single resistor and a pi network to generate a 50
ohm sine wave from ordinary CMOS logic. The series resistor is selected to limit
the current and to isolate the logic device from the reactive load presented by
the pi network. The resistor should be a minimum of 200 ohms for most
inexpensive clock oscillators and low-power logic devices and the output sine
wave level will be about 4 dBm. If the logic device can supply higher current, a
100 ohm resistor may be used to achieve an output level of 10 dBm. AC devices
can drive even heavier loads and >13 dBm outputs are practical with a 68 ohm
series resistor. The pi network is selected to match the series resistance to 50
ohms at the operating frequency. The Q of the pi network may be low since a
square wave has little second harmonic and the third harmonic is three times the
fundamental frequency. A low-Q pi network allows the use of fixed values with no
adjustments. Add a DC blocking capacitor in series with the output if the load
has a DC path to ground. This capacitor may be left out if the load can tolerate
DC current and the decreased efficiency is acceptable.

The values for the components of the pi network may be found in many
references but for reference the reactances for Q = 2 at three resistances are
as follows:

R = 200 ohms, C1 = C2 = 100 ohms reactance, L = 100 ohms reactance

R = 100 ohms, C1 = 50 ohms reactance, C2 = 41 ohms reactance, L = 65 ohms
reactance

R = 68 ohms, C1 = 34 ohms reactance, C2 = 30 ohms reactance, L = 50 ohms
reactance

The nearest values with these reactances should work well and the actual
resistor may be a bit lower since the logic device will have some internal
resistance. If a DC blocking capacitor is added in series with the output it
should be selected to have a very low reactance at the operating frequency -
typically a 0.1 uF.

An ordinary NPN transistor makes an excellent power amplifier for achieving
output levels above 13 dBm with light loading of the logic device as shown in
the figure below:

The above circuit draws about 12 mA from the 15 volt supply while providing
17 dBm at 6 MHz. The pi network is set to a Q of 4 and a step-down ratio of 4:1.
Other output networks are acceptable including tuned transformers or other
matching networks. A grounded-gate JFET may be used in place of the NPN
transistor eliminating the need for the two base bias resistors and the base
bypass capacitor. The U310 is an excellent JFET for frequencies up to several
hundred MHz. Reduce the series resistor if the output amplitude is too low - the
JFET has a source resistance much higher that the NPN emitter resistance.

A "Tee" network may be used in place of the pi network shown above with some
advantages. Since the gate is driving a series inductor instead of a grounded
capacitor, the harmonic loading is much less and a series resistor can often be
avoided entirely. In applications where the source impedance is not particularly
critical and the maximum signal level is desired the Tee network can give
excellent results. The circuit below shows an inexpensive clock oscillator
driving a tee network to provide about 2 volts p-p into 50 ohms. The network
reactances are for Q = 2 and a transformation ratio near 2.5. The reactance
values for other network Qs and transformation ratios may be found in RF
handbooks and application notes - one favorite is AN-267 from Motorola.

A resistor may be added in series with the gate output as before to achieve a
good output VSWR and to protect the gate against shorted outputs. A DC blocking
capacitor in series with one of the inductors is recommended for most
applications to reduce the loading on the gate and to prevent DC from reaching
the load. If a DC blocking capacitor is added it should be selected to have a
very low reactance at the operating frequency - typically a 0.1 uF.